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MYK-11 VLSI ASIC

KG-46/57/96 Downlink Encryptor/Decryptor

MYK-11 VLSI ASIC

The MYK-11 VLSI can encrypt or decrypt using the KG-46, KG-57, and KG-96 algorithms. It is available as engineering models and at higher qualification levels up to QML-V Level. This unit, which replaced the MYK-6, is a rad-hard VLSI chip for embedment applications. View SpecificationResource Library
  • Data Rate: 1bps to 34Mbps
  • Operating Voltage: 4.5 to 5.5 VDC
  • Power Consumption: 40 mW/MHz (nominal)
  • Data Interface: I/O--TTL, Clocks--CMOS
  • Format: NRZ-L
  • Processing: DESC-qualified JAN CMOS gate array
  • Testing: MIL-M-38510/MIL-STD-883 Level "S", MIL-PRF-38535 QML-V.
  • Additional Testing: Group E and DPA Available
  • MTTF: >10M Hours per MIL-HDBK-217E
  • Technology: 1.5 micron Double Level Metal Bulk CMOS gate array
  • Package: 84-pin ceramic flat pack
  • Other: Available in Class B (with protective coating)

Subject to change without notice

View Feature & Benefits Resource Library
  • Satellite downlink encryptor or uplink decryptor
  • Cryptographically-compatible with the KGR-28, KGT-29, KGT-61/KGR-61 (KG-57), KGR-62/KGT-62, KG-96, and MYK-5 and MYK-12 Ground Units
  • Off-the-shelf Level "S" (QML-V) availability. Binary TTL data format. Maximum data rate of 34 Mbps.
  • Controlled cryptographic item (unclassified without key)
  • Meets Level S and QML-V requirements of MIL-M-38510 and MIL-STD-883 and MIL-PRF-38535
  • DESC-qualified JAN CMOS gate array manufacturer
  • Endorsed by NSA for Type 1 and 2 applications
  • Radiation-hardened for space applications: 1 M rad (Si) total dose (> 10 M functional)
  • Single-Event Upset (SEU) 1E-10 errors/cell-day
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