SafeXcel IP MD5/SHA-1/SHA-256 Accelerators
As part of SafeNet's extensive IP product portfolio, SafeNet provides the SafeXcel IP MD5/SHA-1/SHA-256 Accelerators
to meet these requirements. Designed for fast integration, low gate count, and maximum performance, they address
the unique needs of semiconductor OEMs and provide a reliable and cost-effective IP solution that is easy to integrate
into SoC designs.
Benefits
- Silicon-proven hash calculation solution
- Fast & easy to integrate
- Flexible, layered design
- Complete range of configurations
- Includes data scheduling logic
- World-class support
Features
- Supported algorithms: any combination of MD5, SHA-1, and SHA-256
- Supports message padding
- Supports fast hash context switching
- Supports message sizes up to 264–1 bits
- Fully synchronous design
Deliverables
- Synthesizable Verilog RTL source code
- Self-checking RTL test bench, including test vectors and expected result vectors
- Simulation script
- Synthesis script
- User’s Manual with technical specifications, including the programmer’s interface
- Developer’s Manual with step-by-step descriptions that allows developers to easily install, verify, and synthesize the design
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